Herbie Murray
When working with microcontrollers, sleep or deep sleep modes are often used to achieve lower power consumption. The Particle Photon, for example, has several options for achieving low power modes, including Sleep, Stop, and Standby modes. In Sleep mode, only the CPU is stopped, while peripherals continue to operate and can wake up the CPU when an interrupt or event occurs. Stop mode achieves the lowest power consumption while retaining SRAM and register contents. The device can be woken up from Stop mode by any of the 16 EXTI lines or other sources. Standby mode powers off the entire 1.2 V domain and achieves the lowest power consumption, but SRAM and register contents are lost. The device can be woken up from Standby mode by an external reset, an RTC alarm, or other events. The Particle Mesh device can also use a wakeup timeout, where the device will wake up after a specified interval if no pin interrupt occurs. Additionally, a PIR interrupt can be used to wake up the Particle Mesh device, but it is limited to occur once every 2 minutes. These features allow for better battery life and more efficient power management in Particle devices.
| Characteristics | Values |
|---|---|
| Particle Mesh device wakeup timeout | Specified in seconds |
| Particle Mesh device deep sleep mode | Disconnects the device and does not retain the RAM |
| Particle Mesh device wakeup pin | Default is D8 |
| Particle Mesh device power range | 3.3V to 2.6V |
| Particle Mesh device sleep mode | System.sleep |
| Particle Photon sleep mode | SLEEP_MODE_DEEP |
| Particle Photon standby mode | Lowest power consumption |
| Particle Photon stop mode | Lowest power consumption while retaining SRAM and register contents |
| Particle Photon sleep mode wakeup | EXTI line, NRST pin, IWDG reset, RTC alarm/wakeup/tamper/timestamp event, or WKUP pin |
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What You'll Learn
- The Particle Mesh device can be woken up using a wakeup timeout
- Standalone low-power real-time clocks can wake up the Particle Mesh device
- The STM32 can be put into standby mode, waiting for an external interrupt to wake it up
- Stop mode achieves the lowest power consumption while retaining SRAM and register contents
- Sleep mode stops the CPU, but peripherals can wake it up when an interrupt/event occurs
The Particle Mesh device can be woken up using a wakeup timeout
The Particle Mesh device can be woken up from sleep mode using a wakeup timeout. This is done by specifying a third argument, which represents the time in seconds that the device will remain in sleep mode. If no pin interrupt occurs during this interval, the device will wake up automatically after the specified time has passed. For example, if the device is set to wake up after 60 seconds if no event occurs on pin D2, it will automatically wake up after that interval if no interrupt is detected.
The Particle Mesh device has two sleep modes: "Stop mode" and "Deep sleep mode". Stop mode is the standard sleep mode for the device and allows the device to wake up from an interrupt. Deep sleep mode, on the other hand, will disconnect the device and not retain RAM. When the device wakes up from deep sleep mode, any variables in memory will be reset, although data in non-volatile memory, such as EEPROM, will not be affected.
In addition to the wakeup timeout, the Particle Mesh device can also be woken up from sleep by a standalone low-power real-time clock, such as the PCF85063ATL/1, along with the PIR. This setup is used to limit the message count when a new PIR event occurs, allowing a PIR interrupt only every 2 minutes, for example.
The Particle Mesh device can be configured to wake up from deep sleep at regular intervals, such as every 30 minutes, to perform a reading before returning to sleep. This can be achieved with a solar-powered Mesh device that is woken up by a USB/VIN power state change.
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Standalone low-power real-time clocks can wake up the Particle Mesh device
Particle Mesh devices have a
The MCP79410 is another example of a simple external RTC that works well with Particle devices, particularly Gen 3 devices. The RTL872x RTC is another RTC that is compatible with Gen 4 devices (P2, Photon 2, M-SoM). This RTC continues to run while in HIBERNATE sleep, allowing the device to wake based on the duration of time in this mode. However, it is important to note that the RTL872x RTC will be reset on any device reset, and there is no way to add an external backup battery.
Gen 3 devices have an nRF52840 MCU, which handles the RTC differently, especially with regards to sleep modes. On these devices, the RTC does not run in HIBERNATE sleep mode, and the RTC will not be valid after waking up from this mode until the time is synchronized with the cloud. Additionally, you cannot wake Gen 3 devices based on a time duration from HIBERNATE. However, Gen 3 ULTRA_LOW_POWER mode uses only slightly more power than HIBERNATE, and the RTC continues to operate in this mode.
To optimize battery life, it is important to consider the power range that each device can operate within and ensure that the firmware is optimized to keep the device in sleep mode most of the time.
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The STM32 can be put into standby mode, waiting for an external interrupt to wake it up
STM32 has several low power modes available to save power when the CPU does not need to be kept running, for example, when waiting for an external event. The STM32 can be put into standby mode, which is used to achieve the lowest power consumption with a brown-out reset. The internal regulator is switched off so that the VCORE domain is powered off. The PLL, the MSI RC, the HSI16 RC, and the HSE crystal oscillators are also switched off. The system can be woken up from standby mode using a SYS_WKUP pin, an RTC event (alarm or timer), IWDG, or an external reset in NRST pin.
To enter standby mode, you must enable the Wakeup-Pin (A0 or A2) and clear the interrupt flag (since it won't go into standby mode with an interrupt uncleared).
In Stop mode, all clocks in the 1.2 V domain are stopped, and the PLLs, the HSI, and the HSE RC oscillators are disabled. Internal SRAM and register contents are preserved. To enter Stop mode, the systick interrupt must be disabled, or else this interrupt will wake the MCU every time the interrupt is triggered.
In Sleep mode, the CPU CLK is turned OFF, and there is no effect on other clocks or analog clock sources. The current consumption is the highest in this mode compared to other low power modes. To enter Sleep mode, the systick interrupt must first be disabled; otherwise, the interrupt will wake the MCU every time it is triggered.
In addition to the low power modes, the STM32 can also be put into a Low-power run mode, where only the CPU clock is stopped. When wake-up is triggered by an event or an interrupt, the system reverts to the Low-power run mode.
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Stop mode achieves the lowest power consumption while retaining SRAM and register contents
Stop mode achieves the lowest power consumption while retaining the content of SRAM and registers. All clocks in the VCORE domain are stopped, and the PLL, the MSI RC, the HSI16 RC, and the HSE crystal oscillators are disabled. The LSE or LSI can be kept running. Stop 1 has the highest number of active peripherals and wake-up sources, the shortest wake-up time, and the highest power consumption of the Stop modes. Stop 2 mode puts most of the VCORE domain into a lower leakage mode.
The STM32U575/585 microcontrollers (MCUs) are based on the high-performance Arm® 32-bit Cortex® M33 CPU with Arm® TrustZone® and FPU. The STM32U575/585 devices have a "Q" suffix and support the use of the internal SMPS in run and low-power modes, enabling the design of highly efficient low-power applications. The STM32U5 microcontroller series has up to 2MB of flash memory and 786 KB of SRAM, improving performance.
The lowest power consumption is achieved when running from internal Flash with a single-way cache. Instruction caches reduce the number of accesses to memory, which reduces overall current consumption. When using ICACHE, the current consumption of internal SRAM is similar to Flash.
Standby mode provides the best power consumption for applications that need to retain some data, while Shutdown 3 mode is the lowest power mode that preserves all SRAM. Standby mode achieves the lowest power consumption with brown-out reset. The internal regulator is switched off, so the VCORE domain is powered off. The PLL, the MSI, the LSI, and the HSE oscillators are also switched off. The system can be woken up from shutdown mode using a SYS_WKUP pin, an RTC event (alarm or timer), or an external reset in the NRST pin.
Sleep mode is achieved when the system clock frequency is reduced below 2 MHz. The regulator is in low-power mode to minimize its operating current. The system clock is limited to 2 MHz maximum. The MSI internal RC oscillator can be selected as it supports several frequency ranges.
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Sleep mode stops the CPU, but peripherals can wake it up when an interrupt/event occurs
Sleep mode is a low-power state that a device can enter to conserve energy. In this mode, the CPU typically stops executing instructions and may reduce power to certain components. However, it is important to note that not all sleep modes are the same, and the specific behavior can vary depending on the device and its configuration.
For example, in the case of STM32 microcontrollers, the CPU clock is turned off during sleep mode, but all other clock sources remain active. This means that peripherals, such as sensors or input/output devices, can continue to operate and generate interrupts or events. These interrupts can then be used to wake up the CPU and bring it back to its normal operational state.
The ability to wake up from sleep mode using interrupts is a useful feature in many applications. For instance, in the context of the Particle Mesh device, the system can be designed to wake up after a specified timeout period or in response to specific events, such as an interrupt from a PIR sensor. This allows for better battery life and more efficient power management.
It is worth noting that the effectiveness of interrupts in waking up a device from sleep mode depends on the specific sleep mode in use. Some low-power sleep modes may aggressively reduce power consumption by lowering the voltage supply to certain components, which could impact the ability of interrupts to wake up the device. Additionally, the specific implementation details may vary across different processors and microcontrollers, so it is important to refer to the relevant documentation for each device.
In summary, sleep mode can stop the CPU from executing instructions, but peripherals and interrupt controllers can still operate and generate interrupts or events to wake up the CPU when necessary. This functionality enables devices to conserve power while remaining responsive to external stimuli or specific wake-up conditions.
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Frequently asked questions
In Sleep mode, only the CPU is stopped, while peripherals continue to operate and can wake up the CPU when an interrupt/event occurs. Deep Sleep mode, on the other hand, disconnects your device and does not retain the RAM.
The Particle Photon can be woken up from Deep Sleep mode by using the SLEEP_MODE_DEEP option, which puts the STM32 into standby mode. This causes a reboot and the device waits for an external interrupt to wake it up.
The Particle Mesh device can be woken up by using a wakeup timeout when a third argument is specified. It can also be woken up by a PCF85063ATL/1, a standalone low-power real-time clock.
Stop mode achieves the lowest power consumption while retaining the contents of SRAM and registers. In Standby mode, the internal voltage regulator is switched off, and the SRAM and register contents are lost except for those in the backup domain.
Deep Sleep mode is useful for applications where a press of a button or flip of a switch is meant to wake up the device.
